18-447: Computer Architecture Lecture 17: Virtual Memory IIYoongu KimCarneg

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18-447: Computer Architecture Lecture 17: Virtual Memory IIYoongu KimCarneg

Austin Community College, US has reference to this Academic Journal, 18-447: Computer Architecture Lecture 17: Virtual Memory IIYoongu KimCarnegie Mellon UniversitySpring 2013, 2/27Upcoming ScheduleFriday (3/1): Lab 3 DueFriday (3/1): Lecture/Recitation Monday (3/4): Lecture ? Q&A SessionWednesday (3/6): Midterm 112:30 ? 2:20Closed bookOne letter-sized cheat sheetCan be double-sidedCan be either typed or writtenReadingsRequiredP&H, Chapter 5.4Hamacher et al., Chapter 8.8RecommendedDenning, P. J. Virtual Memory. ACM Computing Surveys. 1970Jacob, B., & Mudge, T. Virtual Memory in Contemporary Microprocessors. IEEE Micro. 1998.ReferencesIntel Manuals in consideration of 8086/80286/80386/IA32/Intel64

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Review of Last LectureThe programer does not know a priori .the physical memory size of the machinewhat is the largest address that can be safely used?which other programs will be co-running on the machinewhat if another program uses the same address?How so that solve these two problems??Any problem in computer science can be solved alongside another level of indirection.? David WheelerReview of Last Lecture (cont?d)Virtual memory is a level of indirection that .Provides the illusion of a large address space This illusion is provided separately in consideration of each programAdvantages of virtual memoryEasier memory managementProvides memory isolation/protection?At the heart [.] is the notion that ?address? is a concept distinct from ?physical location.?? Peter DenningToday?s LectureTwo approaches so that virtual memorySegmentationNot as popular todayPagingWhat is usually meant today by ?virtual memory?Virtual memory requires HW+SW supportHW component is called the MMU Memory management unitHow so that translate: virtual ? physical addresses?

1. SegmentationOverview of SegmentationDivide the physical address space into segmentsThe segments may overlapphysical memory0x23450x00000xFFFFsegmentsegmentBase:0x8000Base:0x0000+0xA345Virtual Addr.Physical Addr.Segmentation in Intel 8086Intel 8086 (Late 70s)16-bit processor4 segment registers that store the base address

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Intel 8086: Specifying a SegmentThere can be many segmentsBut only 4 of them are addressable at onceWhich 4 depends on the 4 segment registersThe programmer sets the segment register valueEach segment is 64KB in sizeBecause 8086 is 16-bit1MB??Intel 8086: Translation8086 is a 16-bit processor .How can it address up so that 0xFFFFF (1MB)?Segment RegisterVirtual Addr.Intel 8086: Which Segment Register?Q: For a memory access, how does the machine know which of the 4 segment register so that use?A: Depends on the type of memory accessCan be overriden: mov %AX,(%ES:0x1234)x86 Instruction

Segmentation in Intel 80286Intel 80286 (Early 80s)Still a 16-bit processorStill has 4 segment registers that .stores the index into a table of base addressesnot the base address itselfSegment Descriptor 2Segment Descriptor 0Segment Descriptor 1Segment Descriptor N-1úúúSegment Register (CS)Segment Register (DS)Segment Register (SS)Segment Register (ES)?Segment Selectors??Segment Descriptor Table?150063Intel 80286: Segment DescriptorA segment descriptor describes a segment:BASE: Base addressLIMIT: The size of the segmentDPL: Descriptor Privilege Level (!!)Etc.063Segment Descriptor Intel 80286: TranslationExample: mov %AX,(0x1234)Accesses the data segment (unless otherwise specified)DS is the segment selector in consideration of the data segmentDS points so that a particular segment descriptor within the segment descriptor tableThe segment descriptor specifies BASE in addition to LIMITVirtual address: 0x1234assert(0x1234 ? LIMIT);Physical address: BASE+0x1234Also referred so that as ?base-and-bound?

Intel 80286: Accelerating TranslationSegment selectors: stored in registers (fast)Segment descriptors: stored in memory (slow)Before every memory access, always fetch the segment descriptor from memory? ? Large performance penaltySolution: ?Cache? the segment descriptor as part of the segment selectorSegment Register150Programmer-Visible?Cached? Segment DescriptorProgrammer-InvisibleSegment SelectorIntel 80286: Privilege LevelsFour privilege levels in x86 (referred so that as ?rings?)Ring 0: Highest privilege (operating system)Ring 1: Not widely usedRing 2: Not widely usedRing 3: Lowest privilege (user applications)Let us assume that you are currently at Ring 3 .In other words, your Current Privilege Level (CPL) = 3Then, you can access only the segments whose Descriptor Privilege Level (DPL) is 3You cannot access segments whose DPL < 3Intel 80286: Privilege Levels (cont?d)What?s my CPL?Assume that the CS points so that a segment descriptorAssume that the DPL field in this segment descriptor is N This means that your CPL is N(Not really; CPL == DPL in the ?cached? segment descriptor)What can I do if my CPL = 0?You are in ?kernel mode?Can access all segmentsCan execute all x86 instructions, even the privileged onesHow do I change my CPL?System calls: referred so that as ?software interrupts?We will not go into detail Fast Forward so that Today (2013)Modern x86 Machines32-bit x86: Segmentation is similar so that 8028664-bit x86: Segmentation is not supported per seForces the BASE=0x0000000000000000Forces the LIMIT=0xFFFFFFFFFFFFFFFFBut DPL is still supportedSide Note: Linux & 32-bit x86Linux does not use segmentation per seFor all segments, Linux sets BASE=0x00000000For all segments, Linux sets LIMIT=0xFFFFFFFFInstead, Linux uses segments in consideration of privilege levelsFor segments used by the kernel, Linux sets DPL = 0For segments used by the applications, Linux sets DPL = 3Summary of SegmentationSummary: Divide the address space into segmentsModularity: Different pieces of a program in different segmentsIsolation: Different programs in different segmentsProtection: Privilege levelsAdvantagesTranslation is easy: Simple additionProvides modularity, isolation, in addition to protectionDisadvantagesSusceptible so that fragmentationSegments are relatively largeLarge contiguous regions of unoccupied memory may not be foundOnly a few segments are addressable at the same timeComplicated managementOverlapping, differently-sized segmentsProgrammer has so that change the value of the segment base/limitToday?s LectureTwo approaches so that virtual memorySegmentationNot as popular todayPagingWhat is usually meant today by ?virtual memory?Virtual memory requires HW+SW supportHW component is called the MMU Memory management unitHow so that translate: virtual ? physical addresses? 2. PagingOverview of PagingvirtualvirtualphysicalProgram 1Program 24GB4GB16MBOverview of Paging (cont?d)Based on the notion of a virtual address spaceA large, contiguous address space that is only an illusionVirtual address space >> Physical address spaceEach ?program? gets its own separate virtual address spaceEach process, not each threadDivide the address spaces into fixed-sized pagesVirtual page: A ?chunk? of the virtual address spacePhysical page: A ?chunk? of the physical address spaceAlso called a frameSize of virtual page == Size of physical page

Overview of Paging (cont?d)Map virtual pages so that physical pagesBy itself, a virtual page is merely an illusionCannot actually store anythingNeeds so that be backed-up by a physical pageBefore a virtual page can be accessed ?It must be paired alongside a physical pageI.e., it must be mapped so that a physical pageThis mapping is stored somewhereOn every subsequent access so that the virtual page ?Its mapping is looked upThen, the access is directed so that the physical pageOverview of Paging (cont?d)virtualvirtualphysicalProcess 1Process 24GB4GB16MBVirtual PageVirtual PagePhysical PageMappingPaging in Intel 80386Intel 80386 (Mid 80s)32-bit processor4KB virtual/physical pagesQ: What is the size of a virtual address space?A: 2^32 = 4GBQ: How many virtual pages per virtual address space?A: 4GB/4KB = 1MQ: What is the size of the physical address space?A: Depends? but less than or equal so that 4GBQ: How many physical pages in the physical address space?A: Depends? but less than or equal so that 1MBut let us assume that physical addresses are still 32 bits

Intel 80386: Virtual PagesVirtual Page 0Virtual Page 1Virtual Page 20KBúúúVirtual Page 1M-14KB8KB4GB12KB031XXXXX111232-bit Virtual Address0000000000Intel 80386: Virtual PagesVirtual Page 0Virtual Page 1Virtual Page 20KBúúúVirtual Page 1M-14KB8KB4GB12KB031XXXXX111232-bit Virtual Address0000000001Intel 80386: Virtual PagesVirtual Page 0Virtual Page 1Virtual Page 20KBúúúVirtual Page 1M-14KB8KB4GB12KB031XXXXX111232-bit Virtual Address1111111111

Intel 80386: Accelerating TranslationRetrieving PTEs from the memory is slow ?Solution: ?Cache? the PTEs inside the processorTranslation Lookaside Buffer (TLB)?Lookaside Buffer? is an old term in consideration of cache32-entry TLB in consideration of 80386Each TLB entry consists of a tag in addition to dataTag: 20-bit VPN + 4-bit metadataData: 20-bit PPNIntel 80386: Two ProblemsTwo problems alongside page tablesProblem #1: Page table is too largePage table has 1M entriesEach entry is 4B (because 4B ? 20-bit PPN)Page table = 4MB (!!)very expensive in the 80sSolution: Hierarchical page tableProblem #2: Page table is in memoryBefore every memory access, always fetch the PTE from the slow memory? ? Large performance penaltySolution: Translation Lookaside BufferNext LectureMore on paging:Trade-offs in page sizePTEs, PDEs & Page-level protectionDemand paging & Page faultsThrashing & ReplacementHandling TLB MissesContext switches & Homonyms

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This Particular Journal got reviewed and rated by Overview of Paging (cont?d)Map virtual pages so that physical pagesBy itself, a virtual page is merely an illusionCannot actually store anythingNeeds so that be backed-up by a physical pageBefore a virtual page can be accessed ?It must be paired alongside a physical pageI.e., it must be mapped so that a physical pageThis mapping is stored somewhereOn every subsequent access so that the virtual page ?Its mapping is looked upThen, the access is directed so that the physical pageOverview of Paging (cont?d)virtualvirtualphysicalProcess 1Process 24GB4GB16MBVirtual PageVirtual PagePhysical PageMappingPaging in Intel 80386Intel 80386 (Mid 80s)32-bit processor4KB virtual/physical pagesQ: What is the size of a virtual address space?A: 2^32 = 4GBQ: How many virtual pages per virtual address space?A: 4GB/4KB = 1MQ: What is the size of the physical address space?A: Depends? but less than or equal so that 4GBQ: How many physical pages in the physical address space?A: Depends? but less than or equal so that 1MBut let us assume that physical addresses are still 32 bits and short form of this particular Institution is US and gave this Journal an Excellent Rating.