Chapter 13: I/O Systems End of Chapter 13

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Chapter 13: I/O Systems End of Chapter 13

Woode, Ericka, Midday On-Air Personality has reference to this Academic Journal, PHwiki organized this Journal Chapter 13: I/O Systems Chapter 13: I/O Systems I/O Hardware Explicit I/O Instructions vs. Memory-Mapped I/O Polling vs. Interrupts Programmed I/O vs. DMA Device Drivers Application I/O Interface Kernel I/O Subsystem Trans as long as ming I/O Requests to Hardware Operations Streams Per as long as mance Objectives Explore the structure of an operating system’s I/O subsystem Discuss the principles of I/O hardware in addition to its complexity Provide details of the per as long as mance aspects of I/O hardware in addition to software

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The Requirements of I/O Without I/O, computers are not very useful But thous in addition to s of devices, each slightly different How can we st in addition to ardize the interfaces to these devices Devices unreliable: media failures in addition to transmission errors How can we make them reliable Devices unpredictable in addition to /or slow How can we utilize them if we don’t know what they will do or how they will per as long as m Some operational parameters: Byte/Block Some devices provide single byte at a time (e.g. keyboard) Others provide whole blocks (e.g. disks, tapes, etc) Sequential/R in addition to om Some devices must be accessed sequentially (e.g. tape) Others can be accessed r in addition to omly (e.g. disk, cd, etc.) Polling/Interrupts Some devices require continual monitoring Others generate interrupts when they need service The Goal of the I/O Subsystem Provide Uni as long as m Interfaces, Despite Wide Range of Different Devices This code works on many different devices: int fd = open(“/dev/something”); as long as (int i = 0; i < 10; i++) { fprintf(fd,”Count %dn”,i); } close(fd); Why Because code that controls devices (“device driver”) implements st in addition to ard interface. We will try to get a flavor as long as what is involved in actually controlling devices in rest of lecture Can only scratch surface! Modern I/O Systems Some typical device, network, in addition to bus data rates. I/O Devices Table from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639 Device Rates vary over many orders of magnitude System better be able to h in addition to le this wide range Better not have high overhead/byte as long as fast devices! Better not waste time waiting as long as slow devices Intel Chipset Components: Pentium 4 Northbridge: H in addition to les memory Graphics Southbridge: PCI bus Disk controllers USB controllers Audio Serial I/O Interrupt controller Timers Sun Enterprise 6000 Device-Transfer Rates How does processor talk to device CPU interacts with a Controller Contains a set of registers that can be read in addition to written May contain memory as long as request queues or bit-mapped images Regardless of the complexity of the connections in addition to buses, processor accesses registers in two ways: I/O instructions: explicit in/out instructions Example from the Intel architecture: out 0x21,AB Memory mapped I/O: load/store instructions Registers/memory appear in physical address space I/O accomplished with load in addition to store instructions Device I/O Port Locations on PCs (partial) Separate I/O in addition to memory space. Memory-mapped I/O. Hybrid: control in I/O address, data in memory Memory-Mapped I/O (1) Picture from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639 (a) A single-bus architecture. (b) A dual-bus memory architecture. Memory-Mapped I/O (2) Picture from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639 Memory-Mapped I/O vs. Explicit I/O Instructions Explicit I/O Instructions: Must use assembly language Prevents user-mode I/O Memory-Mapped I/O: No need as long as special instructions (can use in C) Allows user-based I/O Caching addresses must be prevented Notifying the OS: Polling The OS needs to know when: The I/O device has completed an operation The I/O operation has encountered an error One way is to Poll: OS periodically checks a device-specific status register I/O device puts completion in as long as mation in status register Busy-wait cycle to wait as long as I/O from device Pro: simple, potentially low overhead Con: may waste many cycles on polling if infrequent, expensive, or unpredictable I/O operations Notifying the OS: Interrupts I/O Interrupt: Device generates an interrupt whenever it needs service Pro: h in addition to les unpredictable events well Con: interrupts relatively high overhead Some devices combine both polling in addition to interrupts Example: Intel E1000 Gigabit Ethernet Adapter: Interrupt as long as first incoming packet Poll as long as subsequent packets until hardware packet arrival queue is empty Interrupts (Revisited) CPU Interrupt-request line triggered by I/O device Interrupt h in addition to ler receives interrupts Maskable to ignore or delay some interrupts Interrupt vector to dispatch interrupt to correct h in addition to ler Based on priority Some nonmaskable Interrupt mechanism also used as long as exceptions Interrupt-Driven I/O Cycle Intel Pentium Processor Event-Vector Table Properties of a precise interrupt: PC (Program Counter) is saved in a known place. All instructions be as long as e the one pointed to by the PC have fully executed. No instruction beyond the one pointed to by the PC has been executed. Execution state of the instruction pointed to by the PC is known. Precise in addition to Imprecise Interrupts (1) (a) A precise interrupt. (b) An imprecise interrupt. Precise in addition to Imprecise Interrupts (2) Picture from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639 Transfering Data To/From Controller Programmed I/O: Each byte transferred via processor in/out or load/store Pro: Simple hardware, easy to program Con: Consumes processor cycles proportional to data size Direct Memory Access: Give controller access to memory bus Ask it to transfer data to/from memory directly Steps in printing a string. Programmed I/O (1) Picture from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639 Writing a string to the printer using programmed I/O. Programmed I/O (2) Figure from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639 Woode, Ericka WMJJ-FM Midday On-Air Personality www.phwiki.com

Direct Memory Access (DMA) Used to avoid programmed I/O as long as large data movement Requires DMA controller Bypasses CPU to transfer data directly between I/O device in addition to memory Application I/O Interface I/O system calls encapsulate device behaviors in generic classes Device-driver layer hides differences among I/O controllers from kernel Devices vary in many dimensions Character-stream or block Sequential or r in addition to om-access Sharable or dedicated Speed of operation read-write, read only, or write only A Kernel I/O Structure

Picture from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639 Device Drivers Device-specific code in the kernel that interacts directly with the device hardware Supports a st in addition to ard, internal interface Same kernel I/O system can interact easily with different device drivers Special device-specific configuration supported with the ioctl() system call Device Drivers Device Drivers typically divided into two pieces: Top half: accessed in call path from system calls Implements a set of st in addition to ard, cross-device calls like open(), close(), read(), write(), ioctl() This is the kernel’s interface to the device driver Top half will start I/O to device, may put thread to sleep until finished Bottom half: run as interrupt routine Gets input or transfers next block of output May wake sleeping threads if I/O now complete Without a st in addition to ard driver interface. With a st in addition to ard driver interface. Uni as long as m Interfacing as long as Device Drivers Picture from Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639

Layers of the I/O system in addition to the main functions of each layer. User-Space I/O Software Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639

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