# Outline Outline Incremental conflict detection Outline Outline

## Outline Outline Incremental conflict detection Outline Outline

Fox, Jay, Morning Show Host has reference to this Academic Journal, PHwiki organized this Journal Chao Wang NEC Labs, Princeton, NJ COS 598d 3/5/2010 SMT in addition to its Application in Software Verification What is SMT Satisfiability Modulo Theories (SMT) Decision problem as long as logic as long as mulas expressed in classical first-order logic with equality, with respect to combinations of some background theories It is a generalization of SAT, where some Boolean variables are replaced by predicates from a variety of underlying theories. Boolean Satisfiability (SAT) or in addition to not or in addition to or p2 p1 pn Is there an assignment to the p1, p2, , pn variables such that evaluates to 1

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Theory Solver: can be more helpful Conflict analysis: why inconsistent Negative weighted cycle Theory conflict add a Lemma or blocking clause trigger a Boolean conflict A: ( x  y 2 ) ¬ B: ( z  x -7 ) C: ( y – z 3 ) D: ( w – y 10 ) Conflicting clause: (false + false + false) Theory Solver: can be even more helpful Deriving Theory Implications: look-ahead If adding an edge creates a negative cycle negated edge is implied Theory implication var assignment Boolean implication (BCP) A: ( x  y 2 ) ¬ B: ( z  x -7 ) C: ( y – z 3 ) D: ( w – y 10 ) Theory Solver: other desired features Model generation Conflict set generation Deduction of unassigned literals Incremental dont start from scratch as long as each call Backtrackable can undo steps to a previous state Deduction of interface equalities (eij-deduction)

Negative Cycle Detection (st in addition to ard) Bellman-Ford shortest-paths algorithm Detect negative cycles as by-product Take O(nm) time sounds good! However, inside SMT Theory solver will be invoked many times, Each time on a very similar sub-problem Bellman-Ford Algorithm relax (u,v) { if (d[v] > d[u] + w[u,v]) d[v] = d[u] + w[u,v]; } Bellman-Ford ( ) { as long as each node v, initialize d[v] = 0; as long as (i=1; i d[u] + w[u,v] ) return NEGATIVE-CYCLE; return; } A: ( x  y 2 ) ¬ B: ( z  x -7 ) C: ( y – z 3 ) D: ( w – y 10 ) u,v nodes in graph d[u] node score d[v] node score 0 0 Incremental Algorithm // after adding the edge (u,v) if ( d[v] > d[u] + w[u,v] ) { relax (u,v) enqueue (v) } while ( (x=dequeu()) != null) { as long as each edge (x,y) { if (d[y] > d[x] + w[x,y] ) { relax (x,y) if (u==x && v==y) return NEGATIVE-CYCLE; else enqueue (y); } } } return; u v Keep relaxing till it stablize But be as long as e that, if node v is relaxed again, there is a cycle!

Conclusions New method: symbolic predictive analysis Coverage: subsumes known causal models (MCM) Efficiency: SAT-based search vs. explicit enumeration Highlights CTP (Concurrent Trace Program) CSSA (Concurrent Static Single Assignment) SAT-based context bounding Future work Predicting atomicity violations References SMT Satisfiability Modulo Theories (book chapter) Clark Barrett, Roberto Sebastiani, Sanjit A. Seshia, in addition to Cesare Tinelli. In the H in addition to book of Satisfiability, IOS Press, 2009. (available from the authors web pages) Concurrent Software Verification Symbolic Predictive Analysis as long as Concurrent Programs, FM 2009 Chao Wang, Sudipta Kundu, Malay Ganai, in addition to Aarti Gupta Trace based Symbolic Analysis as long as Atomicity Violations, TACAS 2010 Chao Wang, Rhishikesh Limaye, Malay Ganai, in addition to Aarti Gupta (available from the authors web pages)

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