Per as long as mance Evaluation of On-Chip Sensor Network in MPSoC Outline

Per as long as mance Evaluation of On-Chip Sensor Network in MPSoC Outline www.phwiki.com

Per as long as mance Evaluation of On-Chip Sensor Network in MPSoC Outline

Schindler, Esther, Freelance Writer has reference to this Academic Journal, PHwiki organized this Journal Per as long as mance Evaluation of On-Chip Sensor Network in MPSoC Yao Wang, Yu Wang, Jiang Xu, Huazhong YangEE. Dept, TNList, Tsinghua University, Beijing, China Computing System Lab, Dept. of ECEHong Kong University of Science in addition to Technology, Hong Kong, ChinaOutlineMotivationAn Overview of SENoCExperimentsFuture workQ&ALimitations of Bus InterconnectIn the past, the on-chip interconnects are mainly share-medium busesDisadvantages:Bus architecture mainly uses global synchronized circuits, which is harder to realize with the ever increasing frequency because of “clock skew”The per as long as mance of bus interconnect is not scalable with the number of cores. For future MPSoC which will integrate hundreds of cores on a single chip, bus interconnect is no longer suitableARM AMBA Specification in addition to Multi layer AHB Specification (rev2.0), http://www.arm.com, 2001“Architectural innovations as long as network on chip”, Vijaykrisnan Narayanan, Pennsylvania State University

Arkansas State University US www.phwiki.com

This Particular University is Related to this Particular Journal

Network-on-Chip (NoC)To address the disadvantages of bus architec-ture, NoC is proposed to be a solutionAdvantages:Avoid the “clock skew” problem by GALS circuitsSolve the per as long as mance bottleneck by supporting multiple-to-multiple communication patternShorten the design time by supporting IP reuseVarious topologies to fit different applications Partha Pratim P in addition to e, etc. “Per as long as mance Evaluation in addition to Design Trade-offs as long as Network-on-Chip Interconnect Architectures”, IEEE Transactions on ComputersSensor Network-on-Chip (SENoC)Why sensors are employed in MPSoC designMore PUs are integrated in MPSoC Intel predicts that within ten years processors might have tens or even thous in addition to s of cores2. Reducing feature size brings higher variations 180nm->130nm->90nm->65nm->45nm3. Scaling technology introduces higher power density which raises thermal problemFor reliability in addition to per as long as mance optimization concern, we need to introduce sensors into NoC.Working Flow of SENoC

Related Work ICombine NoC in addition to sensors to per as long as m system monitoring in addition to control. Yu Wang et al. proposed a systematic app-roach, on-chip sensor network (SENoC), to collaboratively detect, report, in addition to alleviate run-time threats (e.g. simultaneous switch-ing noise) in MPSoC Avoid the traditional stop-go method, obtain a 26.12% per as long as mance gainYu Wang, Jiang Xu, Shengxi Huang, Weichen Liu, HUazhong Yang, “A Case Study of On-Chip Sensor Network in Multiprocessor System-on-chip,” in CASES 2009Related Work IIBuild a sub-network to transfer only sensor info. Mudduri et al proposed a monitor subsystem called “MNOC” advantage: sensor info will not interfere with the regular trafficdisadvantage: extra area in addition to higher design complexity, not scalable S. Madduri, R. Vadlamani, W. Burleson, R. Tessier, “A Monitor Interconnect in addition to Support subsystem as long as Multicore Processors,” in the Proceedings of the IEEE/ACM Design Antomation in addition to Test in Europe Conference, Nice, France, April 2009.Evaluation of SENoCWhile sensors provide great benefit as long as system reliability in addition to per as long as mance optimization, the sensor in as long as mation will occupy the b in addition to width resources.To evaluate the overhead of per as long as mance loss after adding sensors, our paper develop a SENoC simulation plat as long as m.B in addition to widthRegular dataSensor data

Main Contributions of The PaperWe developed a SENoC simulation plat as long as m in systemC which supports cycle-accurate simulationWe study the average delay of regular data in addition to sensor data, respectively. The results show that the overhead of sensors is negligible , with a max delay overhead of 0.80% when the traffic is not that heavyWe explore the influence of the sensor manger’s location on the network per as long as manceOutlineMotivationAn Overview of SENoCExperimentsFuture workQ&ANoC Architecture44 Mesh-like NoC

SENoC ArchitectureAfter adding sensors in addition to sensor manager, the NoC becomes SENoCRouter ArchitectureThe router routes the flit according to the routing tableNetwork InterfaceNetwork interface multiplex the sensor data in addition to regular data

Switching Methodology4 Virtual Channel, X-Y static routingTime is divided into frames, with 32 time slots as long as ming a frame. In each frame, there are 4 transfer modes according to the status of the output buffersTraditional VC methodSwitching MethodologyEmptyEmptyNon-emptyNon-emptyOutlineMotivationAn Overview of SENoCExperimentsFuture workQ&A

Simulation SetupFlit size: 32Operating frequency: 1GHzData Distribution: Poisson distribution (=0.2)Buffer Size: 10Sensors: 8/per core (For DVS application)Masters: 8 (uni as long as m data flow)Slaves: 8Distribution of Masters & SlavesExperimentsVariable Parameters 1. The location of sensor manager 2. The interval of two sensor data sampling (200, 500, 1000, 2000 cycles. Typically 3000)Per as long as mance metric Average latency of sensor data in addition to regular data, respectively.

ExperimentsResultsConclusion 1: After adding sensor data, the average delay of regular data has no big change (maximum 0.80%)Conclusion 2: The delay of the sensor data increases with the sampling rates.Conclusion 3: Under the uni as long as m data flow, it’s best to place the sensor manager in the center.OutlineMotivationAn Overview of SENoCExperimentsFuture workQ&AFuture work1. Scalability of SENoC When the number of cores rises to 64 or 256 or even more, will our strategy be applicable Consider following idea:2. Placement of sensor manager Hardware: application-aware design, a design methodology to place the SM according to the communication pattern Software: Dynamically locate the SM at a place where the traffic is not heavy to alleviate contention

Schindler, Esther Schindler, Esther Freelance Writer www.phwiki.com

OutlineMotivationAn Overview of SENoCExperimentsFuture workQ&A

Schindler, Esther Freelance Writer

Schindler, Esther is from United States and they belong to Schindler, Esther and they are from  Scottsdale, United States got related to this Particular Journal. and Schindler, Esther deal with the subjects like End-Users; Information Technology Industry; Operating Systems; Software Applications

Journal Ratings by Arkansas State University

This Particular Journal got reviewed and rated by Arkansas State University and short form of this particular Institution is US and gave this Journal an Excellent Rating.